Senior ASIC Design Engineer

About This Role

This engineering role involves designing complex semiconductor chips for rack-scale AI infrastructure. The Senior ASIC Design Engineer will take on meaningful product ownership in a new R&D center, focusing on digital blocks for ambitious connectivity projects. The position suits an engineer who thrives on solving challenging problems in deep-submicron processes and wants to contribute to the digital design foundation for AI infrastructure connectivity.

Responsibilities

• Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support
• Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions
• Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams
• Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient
• Apply design techniques to meet PPA (Power, Performance, Area) targets
• Contribute to design quality through verification and validation activities
• Participate in design methodology improvements and tool automation initiatives
• Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter
• Collaborate effectively across teams to ensure seamless integration

Requirements

• Bachelor's degree in Electrical Engineering or related technical field
• 3+ years of experience in logic design at semiconductor companies
• Knowledge and experience in Verilog and/or SystemVerilog
• Excellent communication skills with ability to work effectively across teams
• Understanding of digital design principles and RTL coding best practices

Nice to have:

• Master's degree in Electrical Engineering or related field
• Knowledge of DDR and PCIe protocols and implementation
• Understanding of power management techniques for low-power design
• Familiarity with Clock Domain Crossing, simulation, debugging, synthesis, and timing analysis
• Proficiency in scripting languages such as Python or Perl
• Experience with high-speed serial interface designs or connectivity protocols

About the Company

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions, collaborating with hyperscalers and ecosystem partners. Its Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. The company also offers custom connectivity solutions.